Inter-Integrated Circuit (I2C)

Inter-Integrated Circuit (I2C)
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History

During the 1980s, Philips developed the two wire inter-integrated circuit (I2C ) bus to provide an easy way to connect peripherals to a central processing unit (CPU/ MCU) in TV applications.

As the circuit became more and more complex with the number of peripherals connections increasing, a method was needed to simplify the design and reduce costs. By limiting the number of printed circuit board (PCB) traces(paths) and reducing general purpose input and output (GPIO) usage on the microcontroller, the I2C bus met this requirement.

Operation

The I2C bus is used in a wide range of applications because it is simple and quick to use. It consists of a two wire communication bus that supports bidirectional data transfer between a master and several slaves. The master or processor controls the bus – in particular, the serial clock (SCL) line. Data is transferred between the master and slave through a serial data (SDA) line. This data can be transferred in four speeds or modes: standard (0 to 100 Kbps), fast (0 to 400 Kbps), fast-mode plus (0 to 1 Mbps) and high-speed (0 to 3.4 Mbps). The most common speeds are the standard and fast modes. See block diagram below for a generic system.

There can be more than one master on a system; the software protocol uses arbitration and synchronization to manage data collisions and loss. Since successive specification enhancements are backward compatible, mixed-speed communication is possible with the bus speed controlled by the processor or I2C master.

 

Features

  • Requires one master device and one or more slave devices.
  • Each device on the bus has a unique address.
  • Bus capacitive load: 400pF max

Rise time:  1000 ns (standard mode) and 300 ns (fast mode)

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